1. Field of the Invention
The present invention relates to a SiC (Silicon Carbide) semiconductor device having a RESURF (Reduced Surface Field) structure at its circumferential portion.
2. Description of Related Art
It is known to provide a silicon power device having a withstand voltage of about 1000 V with a RESURF structure in order to maintain voltage resistance of its circumferential portion. Such a RESURF structure has a cross-section as shown in FIG. 11A. This RESURF structure is made by extending, from a cell portion, a P layer (RESURF layer) J3 doped to 1×1017/cm3 over the surface of an N− drift layer J2 doped to 1×1015/cm3 and formed on an n+-type substrate J1. In the power device provided with the RESURF structure, as shown in FIG. 11B, when a voltage is applied between its circumferential side and the back surface of the substrate, a depletion layer largely extends from the RESURF layer J3 located on the surface of the N− drift layer J2 formed on the substrate J1. This acts to lessen the electric field to maintain voltage resistance of the circumferential portion.
In recent years, SiC is gathering attention as material of power devices due to its high electric field breakdown strength. SiC that has a higher electric field breakdown strength than silicon makes it possible to control a large current. For example, SiC semiconductor devices are expected to be used in motor control for a hybrid vehicle. Devices provided in a hybrid vehicle are required to operate normally in a temperature range from −50 degrees C. to 200 degrees C., assuming that the hybrid vehicle is used under atmospheric temperature of −50 degrees C. to 50 degrees C.
Since SiC is a semiconductor as well as silicon, it is possible to form a RESURF structure of SiC. However, forming a RESURF structure by SiC involves the following problems.
The activation ratio of p-type impurities (the ratio indicating what percentage of doped p-type impurities actually behaves as p-type impurities) has a high temperature-dependence. More specifically, although the activation ratio is almost 100 percent at a temperature of 200 degrees C., it becomes about 1 percent at a temperature of −50 degrees C. Accordingly, if a SiC semiconductor device is designed to have a p-type impurity concentration of 1×1017/cm3, although it performs normally at a temperature of 200 degrees C., punch-through phenomenon may be caused at a temperature of −50 degrees C. when the p-type impurity concentration becomes substantially 1×1015/cm3. On the other hand, if the SiC semiconductor device is designed to have a p-type impurity concentration of 1×1019/cm3 so that it performs normally at a temperature of −50 degrees C., the depletion layer does not extend sufficiently at a temperature of 200 degrees C., causing the voltage resistance to be lowered, because the p-type impurity concentration becomes too high.
Incidentally, Japanese Patent Application Laid-open No. 2003-101039 discloses a structure for preventing lowering of the voltage resistance of a power device. In this structure, a highly doped guard ring layer is formed inside a RESURF layer, and another guard ring layer having about the same impurity concentration as the RESURF layer is formed outside the RESURF layer, so that the voltage resistance of a circumferential RESURF portion is stabilized.
However, although the structure disclosed in this patent document provides the effect of stabilizing the voltage resistance against mask deviation and ion injection variation, it cannot stabilize the voltage resistance against a temperature change in the range between −50 degrees C. and 200 degrees C.